Effect of strain-temperature stress on MOS structure with ultra-thin gate oxide

A method called strain-temperature stress was adopted in this work to improve the quality of ultra-thin oxide on both MOS(p) and MOS(n) capacitors. MOS structures were baked at 100 °C under externally applied mechanical stress. Reduced gate leakage current, reduced interface trap density (Dit), and improved time-dependent-dielectric-breakdown (TDDB) characteristics were observed after tensile-temperature stress treatment without increasing the oxide thickness. On the contrary, compressive-temperature stress resulted in a degraded performance of MOS capacitors. Consequently, the tensile-temperature stress method is suggested as a possible technique to enhance the ultra-thin oxide quality of MOS structure.