Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
540841 | Microelectronic Engineering | 2007 | 8 Pages |
Abstract
In this paper, we examine and compare numerically the board-level reliability of fan-in and fan-out package-on-package stacking assemblies subjected to a specific pulse-controlled drop test condition. The transient analysis follows the support excitation scheme and incorporates with an implicit time integration solver. Numerical results indicate that drop reliability of the package-on-package stacking assembly with a fan-out structural configuration is similar to that with a fan-in design.
Keywords
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Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Yi-Shao Lai, Chang-Lin Yeh, Ching-Chun Wang,