Location of current carrying failure sites in integrated circuits by magnetic force microscopy at large probe-to-sample separation

In integrated circuit failure analysis excessive current flow is often used to indicate the presence of faulty devices. By imaging the magnetic field produced by current flowing in integrated circuit conductors, these faulty devices can be located. Fault location by magnetic field imaging can be problematic as the devices are often buried under several layers of dielectrics and conductors that are up to several microns thick. In this paper we present a new technique for fault location based on magnetic force imaging of the magnetic field. By subtracting magnetic force images acquired at different probe-to-sample distances, the effects due to background, and probe geometry can be eliminated. We demonstrate that this method is capable of locating current carrying failure sites in model circuits with sub-micrometer uncertainty. We show how the technique can be used to map current paths in the presence of interfering currents on power supply and ground lines.