Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
541677 | Microelectronic Engineering | 2008 | 6 Pages |
Abstract
A metallic bonding methodology appropriate for wafer-level optoelectronic die to complementary metal oxide semiconductor (CMOS) circuit integration is introduced. A thin multilayer structure of the Au–20Sn eutectic alloy along with a starting layer of a rare-earth element (Gd) is utilized. Its main advantage is the accomplishment in a single step of both mechanical bonding and electrical interconnection of the heterogeneous devices. Bonding quality assessment and electrical parameters measurements are presented.
Related Topics
Physical Sciences and Engineering
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Authors
P. Robogiannakis, E.D. Kyriakis-Bitzaros, K. Minoglou, S. Katsafouros, A. Kostopoulos, G. Konstantinidis, G. Halkias,