A global view of interconnects

It is clear that the scaling of interconnects and transistors have very different impacts on semiconductor technology. In particular, the inability of the latency of global interconnects to scale with the technology has rather profound impacts on design architectures. There are many approaches for addressing the global interconnect issues including reverse scaling, LC transmission lines, 3D integration, optical interconnects and carbon nanotubes. Each of these options has its merits and penalties with respect to metrics of interest such as delay, energy per bit, bandwidth, pitch, form factor and multi-chip dimension for different interconnect lengths. In this paper, each of the above options is quantitatively benchmarked with respect to the metrics of interest using HSPICE circuit simulations with identical boundary conditions and methodologies. With the diverse number of applications, each of these options has its niche, but scaled and 3D interconnects appear to be the most widely applicable options.