Article ID Journal Published Year Pages File Type
541888 Microelectronic Engineering 2006 5 Pages PDF
Abstract

In the back end of line (BEOL) interconnections for 65 nm and beyond technology nodes, the integration of porous low dielectric constant (low k) materials is now needed to improve signal propagation. Porosity in low k films drives new challenges concerning the different steps of the integration. Thus, the characterization of porosity is needed to develop and optimize low k dielectric films, but also to characterize process steps that may impact the porosity: etch and cleaning processes. In this paper, the impact of several plasma treatments and wet cleaning process on the dielectric material were characterized. All the plasma treatments tested lead to the formation of a thin and dense layer at the material surface with different porosities (pore sealing or open porosity). The cleaning compatibility depends on this thin zone: pore sealing limits water-uptake but can lead to increase the dielectric constant.

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