Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
541906 | Microelectronic Engineering | 2006 | 5 Pages |
Abstract
Continuous down scaling of the interconnect dimensions led to the introduction of copper and low-k dielectric materials. The use of such materials is challenging in the field of mechanical reliability, such as stress-induced voiding in copper interconnects and cracking of low-k dielectrics. Up to now these two failure modes were investigated separately. However, recent experimental observations tend to demonstrate the possibility of a complex interaction between these both failure modes, one overwhelming or enhancing the other. In this paper, a comparison of the risk of void or crack occurrence is made by mean of finite element modeling. Further, the interaction between these two failure modes (voiding and cracking) is also studied.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
S. Orain, A. Fuchsmann, V. Fiori, X. Federspiel,