Article ID Journal Published Year Pages File Type
542423 Microelectronic Engineering 2014 7 Pages PDF
Abstract

•We present an innovatively composite α-Si/SiO2/Si3N4/SiO2 etching technology.•Line width and line width roughness closely relates to etch selectivities.•Current etching process does not have a strong dependence on the line width.•Ultra-fine 22 nm gate patterns with good LWR are achieved.

We presented an innovative composite α-Si/SiO2/Si3N4/SiO2 (α-Si/ONO) hard mask etching technology to produce sub-30 nm ultrafine gate patterns. Effects of process parameters, such as the CF4/CH2F2 flow ratio, 2 MHz LF power and O2 flow, on etch rates of SiO2, Si3N4 and α-Si, and on the etch selectivities between SiO2, Si3N4 and α-Si, were studied using a capacitively coupled plasma (CCP) etcher. It can be observed that the line width of ONO hard mask closely relates to etch selectivities between SiO2 and Si3N4 to α-Si. Only at appropriate etch selectivities, does hard mask opening not exert significant impact on etching profile. In this case, a low line width roughness (LWR) value of 3.3 nm can be achieved.Ultrafine gate patterns that exhibit a smooth and steep etching profile with low LWR are accomplished successfully. Even if the line width is reduced from 29 nm to 22 nm by above 20%, the thickness of remaining ONO hard mask hardly changes. Consequently, the etching technology featuring α-Si/ONO hard mask developed in this work is capable to produce ultrafine gate patterns in the sub-30 nm technology nodes.

Graphical abstractEtch selectivity of SiO2/α-Si effect on line width and LWR, respectively, in (a) 7, (b) 21, (c) infinitely high ratio.Figure optionsDownload full-size imageDownload as PowerPoint slide

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