Article ID Journal Published Year Pages File Type
542526 Microelectronic Engineering 2014 6 Pages PDF
Abstract

•Temperature dependency of the kinetics of PureB deposition over Si/SiO2 surfaces.•HT: enough energy, short initiating time, intermediate reactions, higher DR.•HT-PureB layers: Smooth with low roughness, Uniform and closed, Selective to SiO2.•LT: less energy, higher initiating time, no intermediate reactions, lower DR.•LT-PureB layers: Higher roughness, parasitic deposition only μm sizes Si openings.

Temperature dependency of the kinetics of PureB CVD deposition over patterned Si/SiO2 surfaces has been investigated. It has been shown that there is a large difference between layers deposited at either 400 °C or 700 °C. The latter are very smooth with a roughness less than 2 angstrom (Å) for 2-nm-thick layers. They deposit selectively on the Si surfaces regardless of the Si window size while at lower temperatures like 400 °C the deposition rate drops considerably, and for micron–sized small windows surrounded by large oxide areas the oxide at the perimeter will readily be covered with an irregular, very rough and loosely-bonded deposition of boron. This can degrade the adhesion of subsequent layers which is shown here for plasma-enhanced chemical-vapor-deposited (PECVD) oxide or physical-vapor-deposited (PVD) Al. Some precautions are given for reducing the parasitic B-deposition on oxide surfaces. Besides process and chamber parameters, the local oxide to Si area ratio (LOR) is the one of the parameters that can be adjusted. For example, the oxide surrounding millimeter-large windows may be free of boron deposition due to a reduction of the boron available for deposition outside the window.

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