Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
542657 | Integration, the VLSI Journal | 2016 | 9 Pages |
•Method for layout-aware design and optimization of millimeter-wave PAs.•Custom MOM capacitors with Q>20 at mm-wave frequencies are designed.•The power transistor arrangement, access points and connections are optimized.•The method has been applied to the design and optimization of a low-E-Band PA. Its most significant parameters (power gain, bandwidth, output 1 dB compression point and efficiency) have been measured and compared to simulation results, with good agreement between them. The PA presents a maximum power gain of 21.7 dB at 74 GHz, and the 3-dB bandwidth covers from 72.6 to 75.6 GHz. The maximum output P1dB is 13.8 dBm at 75GHz, with a peak PAE at this point of 14.1%. These performance metrics are comparable to other state-of-the-art devices and make the PA capable of transmitting multi-gigabit signals over E-band wireless links.•The method has been applied to the design and optimization of a low-E-Band PA.•There is good agreement between simulation and measurement results.•The performance metrics are comparable to other-state-of-the-art PAs.
This paper describes a method to design mmW PAs, by modeling the electromagnetic behavior of all the passive structures and the layout interconnections using a 3D-EM solver. It allows the optimization of the quality factor of capacitors (Q-factors>20 can be obtained at 80 GHz), the access points and arrangement of the power transistor cells. The method is applied to the design and optimization of an E-Band PA implemented in a 55 nm SiGe BiCMOS technology. The PA presents a maximum power gain of 21.7 dB at 74 GHz, with a 3-dB bandwidth covering from 72.6 to 75.6 GHz. The maximum output P1dB is 13.8 dBm at 75 GHz and the peak PAE is 14.1%.