A low-power switched-current CDMA matched filter employing MOS linear matching cell with on-chip A/D converter

A low-power switched-current matched filter (MF) for code-division multiple-access (CDMA) systems has been developed. The front-end voltage-to-current (V/I) converter has been eliminated by merging the function into each matching cell utilizing the MOS linear I–V characteristics. A low-power analog-to-digital (A/D) converter has also been developed to establish smooth interfacing to digital back-end processing for a delayed locked loop (DLL) and a RAKE receiver. A proof-of-concept chip was fabricated in a 0.35-μm standard CMOS technology with a measured power consumption of 1.65 mW at 11 Mchip/s with 2-V power supply including the A/D converter.