Stress-induced voiding in nickel silicide

We have discovered stress-induced voiding in a Ni–Pt silicide line fabricated on a 45-nm-node logic device. The voiding led to the disconnection of a narrow silicide line between gates in a wide active area. In the device pattern, the silicide was strained by a shallow trench isolation structure because the filled film in the structure anisotropically loaded tensile stress into the active line under the silicide between the gates. The voids were detected as a failure by thoroughly probing the silicide resistance; the incidence of voids was at the six-sigma confidence level. The voids occurred in the silicide line, which contained di-metal silicide even after a second silicidation annealing. They were suppressed by the formation of monosilicide in the silicide line during a second silicidation annealing. This is attributed to the Ni migration accompanying the counter flow of vacancies being suppressed in the monosilicide under the interconnect fabrication thermal budget. As a result, the defect density for 8-Mbit static random access memory fabricated in 45-nm technology was reduced by about half.

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