| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 543393 | Microelectronic Engineering | 2009 | 4 Pages |
Abstract
The origin of parasitic leakage that occurs in some GeOI pMOSFETs has been investigated and located at the Ge-buried oxide (BOX) interface. Silicon passivation of that interface was found to be effective in reducing this current. An optimum thickness of the buried silicon capping is required to reduce the parasitic leakage current while preserving Ge-like back channel transport properties.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
K. Romanjek, E. Augendre, W. Van Den Daele, B. Grandchamp, L. Sanchez, C. Le Royer, J.-M. Hartmann, B. Ghyselen, E. Guiot, K. Bourdelle, S. Cristoloveanu, F. Boulanger, L. Clavelier,