Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
543629 | Microelectronic Engineering | 2008 | 7 Pages |
Abstract
Thus far, no any effective countermeasure against plating-induced poor uniformity exists in the global packaging market. In this paper, we aim to develop an effective polishing process to improve the poor uniformity existing in advanced double-layer copper pillars. After polishing, the wafer and chip uniformities of copper pillars could be reduced from the original values of 6.8–3.5% and 2.9–0.9%; after reflow, the wafer and chip uniformities of copper pillars reached 3.0% and 1.7%. Excellent uniformity in copper pillars ensures accurate joints, good reliability, high yields, and flexible layouts.
Keywords
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Hou jun Hsu, Jung Tang Huang, Pe Shan Chao, Sheng Hsiung Shih,