Article ID Journal Published Year Pages File Type
543673 Microelectronic Engineering 2008 5 Pages PDF
Abstract

The feature size for next-generation devices is decreasing and edge exclusion widths are becoming stricter, decreasing from 2 to 1.5 mm. The development of a new porous pin chuck is thus necessary for flattening large wafers, including the periphery, which has small and extremely low pins. A reverse production process from the conventional method was adopted to form pins after careful polishing of the chuck surface. It is now possible to both measure and achieve a high level of flatness for pin chucks, while reducing vacuum leakage. Average pin heights were 33 μm in the suction region and 5 μm in the static-pressure seal. The uniformity of pin heights in the seal was improved compared with the conventional static-pressure-seal pin chuck. In addition, the contact ratio between the back surface of a wafer and the pin tops was reduced to 25% that of conventional static-pressure-seal pin chucks by using pins with smaller diameters and porous material.

Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
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