Materials and device structures for sub-32 nm CMOS nodes

The paradigm and the usage of CMOS are changing, and so are the requirements at all levels, from transistor to entire CMOS system. The traditional drivers such as speed and density of integration are the more and more subject to other prerogatives related to power consumption/dissipation (mobile products !), mix of varied digital and analog/RF functions (System On Chip integration), variability, manufacturability, etc. Implications at the transistor level are multiple. Controllability of variations and of the static leakage will add to, and in certain products prevail over, speed and density. Detailed analysis and potential solutions for prolonging CMOS as the leading information technology are presented in this paper.