| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 543946 | Microelectronic Engineering | 2007 | 4 Pages |
Abstract
For SOI nMOSFET, the impact of high tensile stress contact etch stop layer (CESL) on device performance and reliability was investigated. In this work, device driving capability can be enhanced with thicker CESL, larger LOD and narrower gate width. With electrical and body potential inspection, serious device’s degradation happened on SOI-MOSFET with narrow gate device because of STI-induced edge current.
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