III-V field-effect transistors for low power digital logic applications

Sustaining Moore’s Law of doubling CMOS transistor density every twenty four months will require not only shrinking the transistor dimensions, but also introduction of new materials and new device architectures to achieve the highest performance per watt of power dissipation. Compound semiconductor-based quantum-well field effect transistors have recently emerged as a promising transistor option for future ultra low-power logic applications. This paper reviews the opportunities and challenges in this exciting field of research.