| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 543964 | Microelectronic Engineering | 2007 | 4 Pages |
The potential performance of sub-50 nm n-type implant free III-V MOSFETs with an In0.75Ga0.25As channel is studied using Monte Carlo (MC) device simulations. The simulated ID-VG characteristics of the In0.75Ga0.25As implant free MOSFETs are compared with equivalent In0.3Ga0.7As implant free MOSFETs and with a state-of-the-art silicon CMOS transistors. The study is based on careful calibration of the MC simulator against experimental data obtained from a δ-doped In0.52Ga0.48As/ In0.53Ga0.47As/In0.75Ga0.25As heterostructure with a high-κ gate dielectric. At 0.8 V supply voltage, the 30 nm gate length In0.75Ga0.25As implant free III-V MOSFET delivers a drive current of 1730 μA/μm as compared to the 1550 μA/μm obtained in the equivalent In0.3Ga0.7As implant free MOSFET. When this high indium channel transistor is scaled to 20 and 15 nm gate lengths the drive current at 0.8 V supply voltage increases to 2465 and 2745 μA/μm, respectively, making it a good candidate for high performance, low power digital applications at the 22 nm technology generation and beyond.
