Extraction of the floating-gate capacitive couplings for drain turn-on estimation in discrete-trap memories

In this paper, we present an experimental procedure to extract the relative capacitive coupling of drain and gate with the floating-gate in a non-volatile memory cell. The method is used to quantitatively assess the increased drain turn-on immunity of discrete-trap memories in comparison with standard Flash. Results show that a large reduction in the relative drain to floating-gate capacitive coupling is obtained by discrete-trap storage, thanks to the low lateral coupling of the storage nodes.