Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
544087 | Microelectronic Engineering | 2006 | 4 Pages |
Abstract
In this paper, we present an experimental procedure to extract the relative capacitive coupling of drain and gate with the floating-gate in a non-volatile memory cell. The method is used to quantitatively assess the increased drain turn-on immunity of discrete-trap memories in comparison with standard Flash. Results show that a large reduction in the relative drain to floating-gate capacitive coupling is obtained by discrete-trap storage, thanks to the low lateral coupling of the storage nodes.
Related Topics
Physical Sciences and Engineering
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Authors
Christian Monzio Compagnoni, Daniele Ielmini, Alessandro S. Spinelli, Andrea L. Lacaita,