Three dimensional on 300 mm wafer scale nano imprint lithography processes

•300 mm wafer scale stamp manufacturing.•300 mm thermal nano imprint lithography.•3D sub 100 nm wafer scale imprinting with sub 20 nm overlay accuracy.

A three dimensional 300 mm wafer scale nano imprinting lithography was developed. Two process flows were investigated to manufacture sub 100 nm resolution multilevel silicon stamps. Using 193 nm optical lithography and dry etching processes in a standard Integrated Circuit pilot line, we succeeded in manufacturing 5 levels stamps. Depending of the pattern designs and number of required levels onto the stamp, we proposed manufacturing process rules. We also demonstrated that sub 20 nm overlay accuracy over 300 mm wafer was achievable between each level patterned into the stamp. These 3D stamps were then printed over 300 mm wafer coated with 200 nm thick thermoplastic resist layer. We demonstrated that large surface 3D printing with sub 100 nm resolution was achievable with an equivalent patterning throughput of 4 cm2/s. Both the use of silicon hard and polymer soft 3D stamps were investigated to underline the impact of the stamp’s mechanical stiffness onto the residual layer thickness distribution over large surfaces.

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