Article ID Journal Published Year Pages File Type
544574 Microelectronic Engineering 2011 4 Pages PDF
Abstract

In this contribution we show experimental investigations regarding Periodic Pulse Reverse (PPR) plating for the filling of Through Silicon Vias that are aimed for the use in 3D integration applications. The purpose of this method is to prevent the use of plating additives that induce high process complexity in terms of process control and high process costs due to the high consumption of those additives. We therefore compare the effect of PPR plating without additives to that effect of PPR plating with additives. In first results with non-optimized PPR plating we already show the large gain in step coverage during TSV filling compared to standard DC plating.

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