| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 544582 | Microelectronic Engineering | 2011 | 4 Pages |
Abstract
In this paper we will highlight key integration issues that were encountered during the development of the 3D-stacked IC Through Silicon Via (TSV) module and present solutions to achieve a robust copper TSV. Electrical performance of the obtained TSV module is discussed based on a lumped RC model for 3D ring oscillators containing TSVs between bottom and top tiers.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
J. Van Olmen, C. Huyghebaert, J. Coenen, J. Van Aelst, E. Sleeckx, A. Van Ammel, S. Armini, G. Katti, J. Vaes, W. Dehaene, E. Beyne, Y. Travaly,