Article ID Journal Published Year Pages File Type
544583 Microelectronic Engineering 2011 5 Pages PDF
Abstract

In order to anticipate the further demands of miniaturization and integration of “System-in-Package”, the technology of 3D through-silicon-vias (TSVs) has been developed at NXP Semiconductors. The sputtering and the electroplating have been chosen for realize respectively a copper seed layer and a thick copper deposition inside 75 μm wide and hundreds micrometer deep microvias. The microvias, for an aspect-ratio (AR) up to 2.3, can be successfully covered by a sputtered 3 μm thick copper layer. To achieve a thick microvia filling, the pulsed current is preferred and a perpendicular electrolyte flow is critical. With an 11 μm thick patterned photoresist mask on the field, the 75 μm diameter and 180 μm deep microvias can be more-than-the-half filled using the “superfilling” recipe when the field depositing layer reaches the mask level. Such partially filled microvias exhibit excellent electrical resistances within the range of 4 mΩ.

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Physical Sciences and Engineering Computer Science Hardware and Architecture
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