Numerical simulation of III–V FET architectures for high frequency and low consumption applications

III–V FETs (Field Effect Transistor) with high-κ gate dielectric stack are expected to exhibit weak gate leakage and high RF performance. Hence, they could fulfil high-speed and low-power specifications for low operating power technology. Using a Poisson–Schrödinger solver and an ensemble Monte Carlo device simulator, MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) and HEMT (High Electron Mobility Transistor) structures are investigated in terms of gate charge control and both static and dynamic performance. The quasi-static RF performance estimations are confirmed by accurate Y parameter extraction from transient current analysis.