VLSI MOSFETs lifetime reduction caused by impedance mismatch

In this letter, the impact of impedance mismatch between on-die CMOS drivers and driven transmission lines upon device reliability has been studied. The signal waveforms corrupted by the impedance mismatch, experimentally measured at the far-end of the transmission line (45 nm CMOS technology test chip), have been taken as a basis for calculations of Age parameters from the Berkeley reliability tools model. The results reveal that the impedance mismatch accelerates the device degradation due to time-dependent dielectric breakdown, negative bias temperature instability and hot carrier injection wearout mechanisms. Therefore, the impedance mismatch should be regarded also as a reliability issue.