Article ID Journal Published Year Pages File Type
6942146 Integration, the VLSI Journal 2018 8 Pages PDF
Abstract
Pulse width of single event transient can be shrunk by pulse quenching effect in combinational circuits. And it is found that the pulse quenching effect is closely related to the layout of the circuits. In this paper, we propose a placement method for reducing soft errors in combinational circuits by increasing the number of quenching unit and enhancing the pulse quenching effect between them. To evaluate the soft error automatically, an evaluation platform is also implemented and embedded into commercial EDA tools with our placer. Simulation results show that our proposed method can reduce the soft error vulnerabilities by 14%-26%.
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Physical Sciences and Engineering Computer Science Hardware and Architecture
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