Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
6943822 | Microelectronic Engineering | 2013 | 6 Pages |
Abstract
We developed a highly reliable enhanced nitride Interface (ENI) process of barrier low-k using an ultra-thin SiN (UT-SiN) for 40-nm node devices and beyond. The UT-SiN (3Â nm) exhibits stable thickness uniformity and an excellent moisture blocking capability. By using this process, a lower effective k and high via yields were obtained.Compared to the conventional SiCN bi-layer process, 5Ã via electro-migration improvement, 50Ã time dependent dielectric breakdown improvement and no stress induced voiding failure within 1000Â h were observed. The ENI process was analyzed using X-ray photoelectron spectroscopy and time-of-flight secondary ion mass spectrometry. From these analyses, we propose the mechanism for these reliability performance improvements.
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Authors
Tatsuya Usami, Yukio Miura, Tomoyuki Nakamura, Hideaki Tsuchiya, Chikako Kobayashi, Koichi Ohto, Shoichi Hiroshima, Mikio Tanaka, Hiroyuki Kunishima, Issei Ishizuka, Teruhiro Kuwajima, Michio Sakurai, Shinji Yokogawa, Kunihiro Fujii,