| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 6944635 | Microelectronic Engineering | 2012 | 4 Pages |
Abstract
⺠Nanosphere lithography is applied to the charge trap flash memories. ⺠A 500-nm-diameter polystyrene bead array was used as a mask to make patterns. ⺠The pattern depth measured by atomic force microscope was about 4 nm. ⺠The patterned MANOS capacitor shows a good memory characteristics.
Keywords
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Ho-Myoung An, Hee-Dong Kim, Hee-Wook You, Kyeong Heon Kim, Yun Mo Sung, Won-Ju Cho, Tae Geun Kim,