Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
9670310 | Microelectronic Engineering | 2005 | 7 Pages |
Abstract
Besides cost reduction and yield optimisation, advanced interconnect development is nowadays driven by continuous resistance and capacitance improvement in order to reduce RC-delay with shrinking line dimensions. In order to attain these aggressive goals atomic layer deposition (ALD) has successfully been employed to improve line resistance by depositing atomically thin TaN barriers thereby increasing the copper cross section of the line. However, the reliability is still of concern due to a reduced adhesion of the copper seed to the ALD TaN liner. In this paper a PVD copper alloyed seed and a PVD Ta-flash (â¼5Â nm) were used to improve the ALD TaN/Cu interface strength and remedy early electromigration failure. The Cu-seed was alloyed with 1Â at.% aluminium and integrated into state-of-the-art 90Â nm and 65Â nm interconnect structures in order to evaluate the extendibility at narrow line widths. Activation energy and mean time to failure were significantly improved upon replacing the Cu-seed layer with the Cu-alloyed seed. The RC product could be reduced with 30% compared to the PVD base line. Physical analyses like de-wetting tests and time of flight secondary ion spectroscopy (TOF-SIMS) were respectively used to gauge the adhesion improvement, and to measure the diffusion of aluminium in copper. It is shown that the aluminium is staying near the ALD TaN interface after anneal explaining the relative small increase in line resistance and the reduced copper mobility near the interface.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Wim F.A. Besling, X. Federspiel, T. Vanypre, Joaquin Torres,