Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
9670436 | Microelectronic Engineering | 2005 | 5 Pages |
Abstract
The write/erase (W/E) and data retention characteristics of a memory device based on silicon/oxide/silicon dot/oxide/silicon structure were simulated. It was demonstrated that the replacement of the top blocking SiO2 with high-k dielectric results in several important improvements of memory characteristics. In particular, the application of high-k dielectric as a top oxide enhances the electric field in the tunnel oxide, which allows using a thicker bottom oxide to improve the data retention time. In addition, in a new device the magnitude of the W/E pulse and the programming time can also be reduced. A typical design of the new structure leads to a programming duration of 10Â ms and maintains a memory window of 3Â V after 10-year data retention.
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Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
V.A. Gritsenko, K.A. Nasyrov, D.V. Gritsenko, Yu.N. Novikov, J.H. Lee, J.-W. Lee, C.W. Kim, Hei Wong,