Article ID Journal Published Year Pages File Type
9670476 Microelectronic Engineering 2005 4 Pages PDF
Abstract
Positive bias temperature instability (PBTI) in nMOSFETs with ultra thin HfSiON gate dielectrics has been investigated. We propose that PBTI is due to electron trapping in the high-k dielectrics layer and we present results of measurements performed at different bias condition and temperatures consistent with the proposed model. Extrapolated lifetimes indicate that PBTI in HfSiON gate dielectrics severely impacts the reliability of CMOS devices only in the case of Hf rich-layers.
Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
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