Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
9670516 | Microelectronic Engineering | 2005 | 4 Pages |
Abstract
Ta2O5/Nb2O5 bi-layers were prepared on Ru/SiO2/Si substrate by Atomic Layer Deposition, and post annealed up to 575 °C. The crystallization temperature of the bi-layers was 550 °C, which was 100 °C lower than that of Ta2O5 single layer. The thickness of the dielectric layers was also important parameter for the crystallization temperature. Transmittance Electron Microscopy image and depth profile analysis showed that Ta2O5 and Nb2O5 mixed each other during the crystallization. It was suggested that inter diffusion of two layers decreased the crystallization temperature of the bi-layers. Equivalent oxide thickness of crystalline Ru/Ta2O5/Nb2O5/Ru capacitor was 7.6 Ã
with less than 100Â nA/cm2 leakage currents, which satisfied the requirements for 60Â nm generation DRAM capacitor and beyond.
Keywords
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Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Kyuho Cho, Jinil Lee, Jae-Soon Lim, Hanjin Lim, Junghyun Lee, Sungho Park, Cha-Young Yoo, Sung-Tae Kim, U-In Chung, Joo-Tae Moon,