Article ID Journal Published Year Pages File Type
9670670 Microelectronic Engineering 2005 8 Pages PDF
Abstract
A process for creating and testing an on-chip microscale vacuum chamber utilizing standard microfabrication techniques was developed. The fabrication of the microchamber is compatible with the processing of vertical field emission (FE) devices. Using 14 μm diameter patterned photoresist octagons as a mold, a rigid tungsten structure was deposited covering a 2 μm diameter etched hole representing the device region. Standard microfabrication techniques were employed to etch eight-1 μm diameter vias through the tungsten structural layer to allow for removal of the photoresist layer. Subsequent to the photoresist removal, an aluminum film was sputter deposited in vacuum to encapsulate the chamber in a sub-atmospheric pressure environment. Patterning of electrodes into the metallic layers allowed for subsequent testing of the microchamber. The results of current-voltage measurements that were performed on encapsulated and unencapsulated structures demonstrated the ability of the microchambers to maintain vacuum. The described fabrication process yielded a microchamber with a contained pressure of 50 mTorr, however, the process is also compatible with high-vacuum sealing. In this paper, we report the details of the fabrication process and provide the results of testing a vacuum-encapsulated microchamber.
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Physical Sciences and Engineering Computer Science Hardware and Architecture
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