Hetero- and homo-epitaxial growth of 3C-SiC for MOS-FETs

Planar defects, like anti-phase boundaries (APBs) and stacking faults (SFs), are reduced by growing 3C-SiC on undulant-Si whose entire surface is covered with countered slopes oriented in the [1 1 0] and [1¯1¯0] directions. During the initial 3C-SiC growth, APBs are eliminated on each slope of an undulation. Then, one kind of SF self-vanishes. However, another kind of SF remains on the 3C-SiC surface, although its density is gradually reduced with increasing SiC thickness by combining with a counter-SF. The leakage current of a pn diode fabricated homo-epitaxially on 3C-SiC is roughly proportional to the SF density before homo-epitaxial growth. The viability of 3C-SiC grown on undulant-Si for semiconductor devices is discussed by reviewing recent reports on various MOS-FETs using it as the substrate. The key issue in the fabrication of a MOS-FET as a power-switching device operated at high-voltage is to reduce the leakage-current at the pn junction, thereby eliminating SFs.