Ultrathin EOT high-κ/metal gate devices for future technologies: Challenges, achievements and perspectives (invited)

Ultrathin EOT-values are achieved by using optimized processing conditions and interface layer scavenging in metal-gated (TiN and TaN) HfO2HfO2 based planar and bulk-FinFET devices. EOT values down to 4.5 Å (Tinv∼8.5Å) in the planar devices and Tinv<11Å in bulk-FinFETs are demonstrated. Improved EOT-leakage current scaling is observed with the use of chemical oxides as compared to thermally grown SiO2SiO2 as interface layer for the HfO2HfO2. In contrast, the mobility is found independent of the compared interface layers, processing conditions and metal electrodes and follows one trend-line with EOT. The FinFET devices show decreased TinvTinv-values and improved mobility for more narrow fin widths.

Graphical abstractThe interface layer and resulting EOT depends strongly on the metal thickness, the metal type and process conditions. Lowest EOT values (≈4.5 Å) are achieved with a 2 nm HfO2, capped with La and 2 nm TiN desposited in situ.Figure optionsDownload full-size imageDownload as PowerPoint slideHighlights► The interface layer thickness and resulting EOT is thinner for thinner metals. ► The EOT is thicker for TaN compared to TiN by 4-6 Å. ► An insitu Si-cap on top of the metal is found to reduce the EOT by 1.5-3.5 Å. ► Lowest EOT values (4 ∼ .5 Å) are achieved with 2 nm HfO2, with La and 2 nm TiN.