Article ID Journal Published Year Pages File Type
544150 Microelectronic Engineering 2016 8 Pages PDF
Abstract

•A combination of the thinnest MB and the thickest liner possible for a target capacitance value, mitigated stresses.•Airgaps resulted in less tensile stress in copper lines compared to lines without airgaps.•Airgaps could reduce capacitance by up to 27% using silicon nitride liners in a 90 nm pitch BEoL.

In order to understand the state of process induced stresses in airgap interconnect structures fabricated by the etch-back approach, finite element (FE) models of a 90 nm pitch interconnect were developed and a stress analysis of the structure was conducted as a function of the dielectric liner (silicon nitride) and metal barrier (MB) thicknesses. Models of similar structures without airgaps were also developed and the stresses were evaluated as a benchmark case. In addition, a static field solver was used to extract the capacitance of the interconnect structure and evaluate the capacitance reduction by introducing airgaps compared to structures without airgaps. The results identified the sidewall dielectric liner as a critical location where high tensile stress concentration can result in failure of structures under thermo-mechanical loads. Reducing the thickness of the MB and the dielectric liner simultaneously to 1 nm and 2 nm respectively, minimized metal barrier tensile stresses but increased the tensile stress in the dielectric liner dramatically to 1 GPa. Meanwhile, this configuration provided the lowest capacitance and reduced the capacitance of the interconnect by 27% compared to a similar structure without airgaps. In general, reducing the thickness of the MB decreased its stresses both in interconnect structures with and without airgaps.

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