The interface states analysis of the MIS structure as a function of frequency

The energy distribution of interface states (Nss) and their relaxation time (τ) were of the fabricated the Al/SiO2/p-Si (MIS) structures were calculated using the forward bias current–voltage (I–V), capacitance–frequency (C–f) and conductance–frequency (G–f) measurements. Typical ln[I/(1 − exp(−qV/kT)] versus V characteristics of MIS structure under forward bias show one linear region. From this region, the slope and the intercept of this plot on the current axis allow to determine the ideality factor (n), the barrier height (Φb) and the saturation current (IS) evaluated to 1.32, 0.77 eV and 3.05 × 10−9 A, respectively. The diode shows non-ideal I–V behaviour with ideality factor greater than unity. This behaviour is attributed to the interfacial insulator layer at metal–semiconductor interface, the interface states and barrier inhomogeneity of the device. The energy distribution of interface states (Nss) and their relaxation time (τ) have been determined in the energy range from (0.37 − Ev) to (0.57 − Ev) eV. It has been seen that the Nss has almost an exponential rise with bias from the mid gap toward the top of valance band. In contrary to the Nss, the relaxation time (τ) shows a slow exponential rise with bias from the top of the Ev towards the mid gap energy of semiconductor. The values of Nss and τ change from 6.91 × 1013 to 9.92 × 1013 eV−1 cm−2 and 6.31 × 10−4 to 0.63 × 10−4 s, respectively.