Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
6943418 | Microelectronic Engineering | 2015 | 6 Pages |
Abstract
(Upper) Illustration of MEMS 3D integration and wafer-level packaging with a typical TSV technology; (lower left) schematic of an ICP etch system; (lower right) a 50 μm via with 72° profile by means of ICP etch.137
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Zhong Ren, Mark E. McNie,