کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
13432420 | 1842670 | 2020 | 33 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Stochastic multi-objective Pareto-optimization framework for fully automated ab initio network-on-chip design
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موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
شبکه های کامپیوتری و ارتباطات
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چکیده انگلیسی
With the advent of multi-core processors, network-on-chip design has been crucial in addressing network performances, such as bandwidth, power consumption, and communication delays when dealing with on-chip communication between the increasing number of processor cores. As the numbers of cores increase, network design becomes inherently more complex. Therefore, there is a critical need in soliciting computer aid in determining network configurations that afford optimal performance given multi-objectives, such as resource and design constraints. We have devised a stochastic multi-objective Pareto-optimization framework that fully automatically explores the space of possible network configurations to determine optimal network latencies, power consumption, and the corresponding link allocations, i.e., the actual network-on-chip design, ab initio with only the number of routers given. For a given number of routers, average network latency and power consumption as example performance objectives can be displayed in form of Pareto-optimal fronts, thus not only offering a powerful automatic network-on-chip design tool, but also affording trade-off studies for the chip designers.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Journal of Systems Architecture - Volume 103, February 2020, 101686
Journal: Journal of Systems Architecture - Volume 103, February 2020, 101686
نویسندگان
Tzyy-Juin Kao, Wolfgang Fink,