Bias stress effect on high mobility-hysteresis free pentacene-based organic thin film transistors

• Organic thin film transistors are fabricated and characterised.
• Stability study is conducted for some devices.
• Detailed bias voltage effects are analysed.
• Optimisation of fabrication process.
• Electrical and surface morphology relations are discussed.

Fabrication and characterisation of pentacene-based top contact organic thin film transistors (OTFTs) with poly(methyl methacrylate) (PMMA) as the dielectric layer have been investigated. Stability of OTFTs was also investigated as devices were retested after 12 months of fabrication. The effects of bias stress on the OTFTs are studied and modelled for different stress conditions (different gate and drain bias stress measurements and stress times). The effects of bias stress have been expressed in terms of the shift in threshold voltage ΔVT for a given stress condition. The shifts in threshold voltage has been analysed for different gate–source and drain–source voltages. The devices have demonstrated a negligible hysteresis in both the transfer and output characteristics of the OTFTs due to application of stress voltage, indicating traps-free interface between the pentacene and PMMA.

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