Strained Si channel NMOSFETs using a stress field with Si1−yCy source and drain stressors

The strain field in the silicon channel of a metal–oxide–semiconductor transistor with silicon–carbon alloy source and drain stressors was evaluated using the commercial process simulator FLOOPS-ISE™. The physical origin of the strain components in the transistor channel region was explained. The magnitude and distribution of the strain components, and their dependence on device design parameters such as the spacing LG between the silicon–carbon alloy stressors, the carbon mole fraction in the stressors and stressor depth were investigated. Reducing the stressor spacing LG or increasing the carbon mole fraction in the stressors and stressor depth increases the magnitude of the vertical compressive stress and the lateral tensile stress in the portion of the N channel region where the inversion charge resides. This is beneficial for improving the electron mobility in n-channel metal–oxide–semiconductor transistors. A simple guiding principle for an optimum combination of the above-mentioned device design parameters in terms of mobility enhancement, drain current enhancement and the tradeoff consideration for junction leakage current degradation.