A leakage-aware L2 cache management technique for producer–consumer sharing in low-power chip multiprocessors

This paper proposes a novel leakage management technique for applications with producer–consumer sharing patterns. Although previous research has proposed leakage management techniques by turning off inactive cache blocks, these techniques can be further improved by exploiting the various run-time characteristics of target applications in CMPs. By exploiting particular access sequences observed in producer–consumer sharing patterns and the spatial locality of shared buffers, our technique enables a more aggressive turn-off of L2 cache blocks of these buffers. Experimental results using a CMP simulator show that our proposed technique reduces the energy consumption of on-chip L2 caches, a shared bus, and off-chip memory by up to 31.3% over the existing cache leakage power management techniques with no significant performance loss.

▸ LAPC reduces the leakage energy consumption of private L2 caches in CMPs. ▸ LAPC exploits the characteristics of cache blocks with producer–consumer patterns. ▸ LAPC detects cache blocks with producer–consumer patterns. ▸ LAPC detects adaptively turns off the detected cache blocks. ▸ LAPC reduces the leakage energy consumption of L2 caches over previous techniques.