کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
454157 | 695108 | 2010 | 10 صفحه PDF | دانلود رایگان |
In an attempt to improve the speed of VLSI signal processing systems, a new architecture for a high-speed multiply–accumulate (MAC) unit optimized for digital filters is proposed. This unit is designed as a coprocessor for the LEON2 RISC processor [LEON2 Processor; 2005 [Online].
Journal: Computers & Electrical Engineering - Volume 36, Issue 5, September 2010, Pages 864–873