کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
460604 | 696405 | 2013 | 13 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
High-level power and performance estimation of FPGA-based soft processors and its application to design space exploration
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
شبکه های کامپیوتری و ارتباطات
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چکیده انگلیسی
This paper presents a design space exploration framework for an FPGA-based soft processor that is built on the estimation of power and performance metrics using algorithm and architecture parameters. The proposed framework is based on regression trees, a popular machine learning technique, that can capture the relationship of low-level soft-processor parameters and high-level algorithm parameters of a specific application domain, such as image compression. In doing this, power and execution time of an algorithm can be predicted before implementation and on unseen configurations of soft processors. For system designers this can result in fast design space exploration at an early stage in design.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Journal of Systems Architecture - Volume 59, Issue 10, Part D, November 2013, Pages 1144–1156
Journal: Journal of Systems Architecture - Volume 59, Issue 10, Part D, November 2013, Pages 1144–1156
نویسندگان
Adam Powell, Christos Savvas-Bouganis, Peter Y.K. Cheung,