Generalized fractional logistic map encryption system based on FPGA

This paper introduces the design of a generalized fractional order logistic map suitable for pseudorandom number key generators and its application in an encryption system based on FPGA. The map is generalized through two parameters (a,b) where complete analysis of their effect on the map is detailed, which gives more control on the map chaotic regions. The vertical map and the zooming map presented in this paper are two special maps extracted from the generalized map with their detailed analysis. Not only the positive bifurcation, but also the negative side is discussed through this paper, covering the complete diagram. The specifications of the introduced special logistic maps are proved to be completely controlled through eight design problems with their Lyapunov exponent. As an application, these eight designs are used for the key generation to encrypt different images through a simple algorithm. The correlation coefficients (horizontal, vertical, and diagonal) of the encryption system proposed, as well as the response to differential attacks are calculated. The sensitivity analysis proves that the encryption algorithm develops high sensitivity to the fractional-order key, which appears from the wrong decryption with 0.001% change of any system parameter. The encryption system is implemented on a Virtex-5 FPGA, XC5VLX50T, with a maximum clock frequency equal to 58.358 MHz.