کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
4960353 | 1364895 | 2017 | 8 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Comparative analysis of different AES implementation techniques for efficient resource usage and better performance of an FPGA
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
علوم کامپیوتر (عمومی)
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چکیده انگلیسی
Over the past few years, cryptographic algorithms have become increasingly important. Advanced Encryption Standard (AES) algorithm was introduced in early 2000. It is widely adopted because of its easy implementation and robust security. In this work, AES is implemented on FPGA using five different techniques. These techniques are based on optimized implementation of AES on FPGA by making efficient resource usage of the target device. Experimental results obtained are quite varying in nature. They range from smallest (suitable for area critical application) to fastest (suitable for performance critical applications) implementation. Finally, technique making efficient usage of resources leads to frequency of 886.64Â MHz and throughput of 113.5Â Gb/s with moderate resource consumption on a Spartan-6 device. Furthermore, comparison between proposed technique and existing work shows that our technique has 32% higher frequency, while consuming 2.63Ã more slice LUTs, 8.33Ã less slice registers, and 12.59Ã less LUT-FF pairs.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Journal of King Saud University - Computer and Information Sciences - Volume 29, Issue 3, July 2017, Pages 295-302
Journal: Journal of King Saud University - Computer and Information Sciences - Volume 29, Issue 3, July 2017, Pages 295-302
نویسندگان
Umer Farooq, M. Faisal Aslam,