Improving non-suspended carbon nanotube FET performance by using an alumina protective layer

• Atomic-layer-deposited alumina is used to protect CNTs during device fabrication.
• The amount of resist residues on the CNT surface is effectively reduced.
• CNFET on-state resistance and hysteresis width are significantly reduced.
• The approach can be easily implemented in other CNT-related fabrication processes.

Fabrication of high-performance carbon nanotube field effect transistors (CNFETs) is an essential prerequisite for obtaining competitive CNFET-based gas sensors. In reality, the CNFET performance is heavily affected by lithography-induced resist residues on or around the nanotubes. These impurities aggravate the gate hysteresis and cause high electrical on-resistance of CNFETs. To address this problem, we present an approach using the atomic-layer-deposited alumina as a protective layer to prevent direct contact between carbon nanotubes (CNTs) and patterning resists. The alumina layer can be easily and completely removed from the CNTs prior to contact metallization. Based on the comparison of 491 devices, we find that the median on-resistance is reduced from 247 kΩ to 134 kΩ by using the alumina protective layer. Additionally, the median hysteresis width extracted from the CNFET transfer characteristics is narrowed dramatically from 2.2 V to ∼0.5 V. The simplicity of the presented process sequence allows for its easy integration into various fabrication processes involving CNTs.