Double-gate 1T-DRAM cell using nonvolatile memory function for improved performance

We propose a double-gate (DG) 1T-DRAM cell combining SONOS type storage node on the back-gate (control-gate) for nonvolatile memory function. The cell sensing margin and retention time characteristics were systematically examined in terms of control-gate voltage (Vcg) and nonvolatile memory (NVM) function. The additional NVM function is achieved by Fowler–Nordheim (FN) tunneling electron injection into the nitride storage node. The injected electrons induce a permanent hole accumulation layer in silicon body which improves the sensing margin and retention time characteristics. To demonstrate the effect of stored electrons in the nitride layer, experimental data are provided using 0.6 μm devices fabricated on SOI wafers.

Research highlights
► The DG 1T-DRAM cell has storage node on one gate for nonvolatile memory function.
► Experimental results show improved sensing margin and retention time.
► The larger excess of holes in the Si body induced by the electrons stored in the nitride.