Impact of substrate bias and dielectrics on the performance parameters of symmetric lateral bipolar transistor on SiGe-OI for mixed signal applications

In our strive to improve upon low power high speed devices for digital and mixed signal applications, Symmetric Lateral Bipolar Transistor has come out as a promising candidate and gained importance of late. Researchers in the field have shown improved performance parameters with this novel device for digital and analog applications. We investigate for the first time the impact of substrate bias for symmetric lateral bipolar transistor on Silicon Germanium on Insulator (SiGe-OI) with varying thickness of active device area (TSiGe), thickness of BOX layer (TBox) and k-values of dielectric BOX layer for analog/mixed signal applications. We optimize our design in terms of major performance parameters like gain and fT by varying parameters like TSiGe, TBox and k-values of dielectric BOX under substrate biased condition. We were able to achieve an improvement in gain and fT (in GHz) by almost 41.7% @ IC ˜ 1 μA/μm and 1.4% respectively by increasing the k-value of BOX from 3.9 to 22 with substrate bias. We studied for the first time complementary symmetric lateral bipolar (CSLB) inverter with the introduction of high-k BOX along with substrate bias for digital applications. The inverter shows a low noise margin (NML) and a high noise margin (NMH) of 0.45 V and 0.37 V respectively when operated at 1.0 V.